700.305 (18W) Chip Design 1
Overview
- Lecturer
- Course title german Chip Design 1
- Type Lecture - Course (continuous assessment course )
- Hours per Week 2.0
- ECTS credits 4.0
- Registrations 7 (25 max.)
- Organisational unit
- Language of instruction no language of instruction was specified
- Course begins on 16.10.2018
- eLearning Go to Moodle course
Time and place
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Course Information
Intended learning outcomes
The course should provide an introduction to chip design including devices, modeling, design and simulation of integrated circuits
Teaching methodology including the use of eLearning tools
Lectures and labs using CAD tools
Course content
- Basics in integrated circuits (chip) design
- Properties of digital and analog integrated circuits
- Basic physics and models of pn-junction diodes and MOS transistors
- Introduction to IC technology / process and mask layout
- Design and simulation of basic analog transistor circuits
- Static combinatorial and sequential logic in CMOS
- Integrated circuit abstraction levels: transistor level (full custom), cell level (semi-custom) and array level (FPGA)
- Design hierarchies, VHDL und logic synthesis
- Labs and homework
Prior knowledge expected
Fundamentals in electronic devices and circuits
Literature
Lectures slides and lab descriptions will be provided during lecture.
Recommended literature for deeper studies:
- Behzad Razavi, Design of Analog CMOS Integrated Circuits, Mc Graw Hill, Inc. 2001.
- Jan Rabaey, Digital Integrated Circuits, A Design Perspective
Examination information
Im Fall von online durchgeführten Prüfungen sind die Standards zu beachten, die die technischen Geräte der Studierenden erfüllen müssen, um an diesen Prüfungen teilnehmen zu können.
Grading scheme
Grade / Grade grading schemePosition in the curriculum
- Master's degree programme Information and Communications Engineering (ICE)
(SKZ: 488, Version: 15W.1)
-
Subject: Information and Communications Engineering: Supplements (NC, ASR)
(Compulsory elective)
-
Wahl aus dem LV-Katalog (Anhang 4) (
0.0h VK, VO, KU / 14.0 ECTS)
- 700.305 Chip Design 1 (2.0h VC / 4.0 ECTS)
-
Wahl aus dem LV-Katalog (Anhang 4) (
0.0h VK, VO, KU / 14.0 ECTS)
-
Subject: Information and Communications Engineering: Supplements (NC, ASR)
(Compulsory elective)
- Master's degree programme Information and Communications Engineering (ICE)
(SKZ: 488, Version: 15W.1)
-
Subject: Technical Complements (NC, ASR)
(Compulsory elective)
-
Wahl aus dem LV-Katalog (Anhang 5) (
0.0h VK, VO, KU / 12.0 ECTS)
- 700.305 Chip Design 1 (2.0h VC / 4.0 ECTS)
-
Wahl aus dem LV-Katalog (Anhang 5) (
0.0h VK, VO, KU / 12.0 ECTS)
-
Subject: Technical Complements (NC, ASR)
(Compulsory elective)
- Master's degree programme Information and Communications Engineering (ICE)
(SKZ: 488, Version: 15W.1)
-
Subject: Information and Communications Engineering: Supplements (NC, ASR)
(Compulsory elective)
-
Wahl aus dem LV-Katalog (Anhang 4) (
0.0h VK, VO, KU / 14.0 ECTS)
- 700.305 Chip Design 1 (2.0h VC / 4.0 ECTS)
-
Wahl aus dem LV-Katalog (Anhang 4) (
0.0h VK, VO, KU / 14.0 ECTS)
-
Subject: Information and Communications Engineering: Supplements (NC, ASR)
(Compulsory elective)
- Master's degree programme Information and Communications Engineering (ICE)
(SKZ: 488, Version: 15W.1)
-
Subject: Technical Complements (NC, ASR)
(Compulsory elective)
-
Wahl aus dem LV-Katalog (Anhang 5) (
0.0h VK, VO, KU / 12.0 ECTS)
- 700.305 Chip Design 1 (2.0h VC / 4.0 ECTS)
-
Wahl aus dem LV-Katalog (Anhang 5) (
0.0h VK, VO, KU / 12.0 ECTS)
-
Subject: Technical Complements (NC, ASR)
(Compulsory elective)
- Master's degree programme Information Technology
(SKZ: 489, Version: 06W.3)
-
Subject: Additional Technical Module II
(Compulsory subject)
-
3.1-3.3 Lecture with Exercises or Lecture with Seminar (
6.0h VK/VS / 12.0 ECTS)
- 700.305 Chip Design 1 (2.0h VC / 4.0 ECTS)
-
3.1-3.3 Lecture with Exercises or Lecture with Seminar (
6.0h VK/VS / 12.0 ECTS)
-
Subject: Additional Technical Module II
(Compulsory subject)
Equivalent courses for counting the examination attempts
-
Sommersemester 2024
- 700.305 VC Chip Design 1 (2.0h / 4.0ECTS)
-
Sommersemester 2023
- 700.305 VC Chip Design 1 (2.0h / 4.0ECTS)
-
Sommersemester 2022
- 700.305 VC Chip Design 1 (2.0h / 4.0ECTS)
-
Sommersemester 2021
- 700.305 VC Chip Design 1 (2.0h / 4.0ECTS)
-
Sommersemester 2020
- 700.305 VC Chip Design 1 (2.0h / 4.0ECTS)
-
Wintersemester 2016/17
- 700.305 VC Chip Design (2.0h / 4.0ECTS)
-
Sommersemester 2015
- 700.305 VK Chip Design 1 (2.0h / 4.0ECTS)
-
Sommersemester 2014
- 700.305 VK Chip Design 1 (2.0h / 4.0ECTS)
-
Sommersemester 2013
- 700.305 VK Chip Design 1 (2.0h / 4.0ECTS)