The impact of supply chain design options on performance measures in the semiconductor industry
We analyse a semiconductor supply chain facing stochastic demand and uncertainties in lead-times. A semiconductor supply chain typically consists of several stages such as frontend production, backend production and distribution centres (DCs). A common strategy in this high-volume supply network is to maintain a significant inventory of products (called die-bank), between the frontend production and backend assembly stages. Since most customisation takes place in assembly and final test, this approach allows wafers to be pulled from the die-bank and processed rapidly through final test for delivery, avoiding the long cycle times of the frontend wafer fabs. However, this leads to increased complexity in addition to the uncertainties in demand and lead-times, e.g. make-to-stock vs. make-to-order or assembly-to-order processes. The objective is to determine the best strategy in terms of inventory positioning and DCs localisations in the network in a way that the amount of the inventory (safety stock) and transport costs are minimized. We build a simulation model for the semiconductor supply chain under study. We compare different network configurations such as centralised and decentralised distribution centres by considering the impact on operational performance measures such as services levels, lead-time and WIP.
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